A Si/SiC heterojunction double-trench MOSFET with improved conduction characteristics is proposed. By replacing the N+ source and P-ch regions with silicon, the device forms a Si/SiC heterojunction that exhibits Schottky-like characteristics, effectively deactivating the parasitic PiN body diode and improving third-quadrant performance. A high-k gate dielectric is incorporated to induce a strong electron accumulation layer at the heterointerface, thinning the energy barrier and enabling tunneling-dominated current transport, thereby significantly enhancing the first-quadrant performance. TCAD simulation results demonstrate that the proposed device achieves a specific on-resistance (Ron,sp) of 1.78 mΩ·cm2, representing a 20.5% reduction compared to the conventional SiC DTMOS, while maintaining a comparable breakdown voltage (BV) of approximately 1380 V. A significant reduction in the third-quadrant turn-on voltage (Von) is achieved with the proposed structure, from 2.74 V to 1.53 V. Meanwhile, the unipolar conduction mechanism similar to that of Schottky effectively suppresses bipolar degradation. To enhance device reliability, the design incorporates a trenched source and heavily doped P-well, which collectively mitigate high electric field concentrations at the trench corners. The proposed device offers an integration strategy enhancing both forward conduction and reverse conduction in high-voltage power electronics.
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